BICT / BICTE Digital Logics (2nd Sem)

Tribhuvan University

Faculty of Education

Course Title: Digital Logics

Course no: ICT Ed. 425

Nature of course: Theory + Pratical

Full Marks: 100

Pass Marks: 40

Credit Hours: 3

Course Description : Digital Logics covers fundamental topics such as logic gates, Boolean algebra, combinational and sequential circuit design, finite state machines, and digital system architecture. Students engage in a mix of lectures, laboratory sessions, and hands-on projects, allowing them to apply theoretical concepts to practical scenarios. Emphasis is placed on designing and analyzing digital circuits, utilizing simulation software, and implementing logic designs using hardware description languages. Practical activities include building and testing circuits, troubleshooting digital systems, and using design tools to create efficient and reliable digital solutions.

Course Objective : This module aims to impart the basic management knowledge, and skills to the students so as to enhance their managerial capabilities and enable them to apply in the practical field

Course Contents:

Unit 1. Introduction to Digital System 3 Hrs.

Introduction to Analog and digital system, Features of Digital Systems, Number Systems- Decimal, Binary, Octal, Hexadecimal and their inter conversions, Binary Arithmetic. complement system and subtraction using 1's, 2's, 9's, and 10's complement method, Codes: BCD, XS-3, Gray code, hamming code, alphanumeric codes (ASCII, EBCDIC,
UNICODE), Error detecting and error correcting codes.

Unit 2. Logic Gates and Boolean Algebra 3 Hrs.

Basic definition of Boolean Algebra, Basic Theory of Boolean Algebra, Boolean Functions, Logical operations, Logic Gates, IC Digital Logic Families. Basic gates(AND, OR, NOT gates), Universal gates (NAND and NOR gates), other gates (XOR, XNOR gates), Boolean identities, De Morgan Laws.

Unit 3. Combinational Circuit Design 3 Hrs.

Half adder, full adder, half subtracter, and full subtracter. Code converters, Multiplexers and demultiplexers, Encoders and decoders, Combinational Circuit design procedure
Binary Parallel Adder, Decimal Adder.

Unit 4. Simplification of Boolean Functions 3 Hrs.

Simplification of Boolean algebra using Boolean rules, K-map method (two, three, and four Variable Maps), Don’t care conditions, Canonical and standard forms, product of Sums, sum of product simplification, NAND and NOR implementation, Quine McClusky method.

Unit 5. Sequential Circuit Design 3 Hrs.

Flip-flops: RS, JK, D, and T, Latches, Triggering of flip-flops, Master slave flip flop, Flip-flop excitation table and design procedure, state diagram and simple sequential circuits.

Unit 6. Registers, Counters, Memories and Programmable Logic Devices 3 Hrs.

Resisters, Shift registers, Analysis of synchronous sequential circuit, Design of synchronous sequential Circuits: Counters, state diagram, state reduction, state assignment
Analysis of asynchronous sequential circuit, Problems of asynchronous sequential circuit design, Memories: ROM, PROM, EPROM, PLD, PLA, Digital Logic Families: TTL, ECL, and CMOS.

Unit 7. VHDL 3 Hrs.

RTL Design with VHDL, Shape of VHDL, Data Types, Concurrent Statements, RTL Design with VHDL7 Shape of VHDL, Data Type Concurrent Statements
Processes and Variables, Simulating a Simple Design3 Creating Memory, Finite State Machines Loops and Conditional Elaboration AttributesZ Processes and Variables, Simulating a Simple Design, Creating Memory inite State Machines Attributes